The present invention relates generally to the fabrication of semiconductor devices, and more particularly to magnetic random access memory (MRAM) devices.
Semiconductors are used for integrated circuits for electronic applications, including radios, televisions, cell phones, and personal computing devices, as examples. One type of semiconductor device is a semiconductor storage device, such as a dynamic random access memory (DRAM) and flash memory, which use a charge to store information.
A more recent development in memory devices involves spin electronics, which combines semiconductor technology and magnetics. The spin of an electron, rather than the charge, is used to indicate the presence of a xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d. One such spin electronic device is a magnetic random-access memory (MRAM), which includes conductive lines positioned perpendicular to one another in different metal layers, the conductive lines sandwiching a magnetic stack. The place where the conductive lines intersect is called a cross-point. A current flowing through one of the conductive lines generates a magnetic field around the conductive line and orients the magnetic polarity into a certain direction along the wire or conductive line. A current flowing through the other conductive line induces the magnetic field and can partially turn the magnetic polarity, also. Digital information, represented as a xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d, is storable in the alignment of magnetic moments. The resistance of the magnetic component depends on the moment""s alignment. The stored state is read from the element by detecting the component""s resistive state. A memory cell may be constructed by placing the conductive lines and cross-points in a matrix structure having rows and columns.
An advantage of MRAMs compared to traditional semiconductor memory devices such as DRAMs is that MRAMs are non-volatile. For example, a personal computer (PC) utilizing MRAMs would not have a long xe2x80x9cboot-upxe2x80x9d time as with conventional PCs that utilize DRAMs. Also, an MRAM does not need to be powered up and has the capability of xe2x80x9crememberingxe2x80x9d the stored data.
Preferred embodiments of the present invention achieve technical advantages as an MRAM device having magnetic memory storage cells coupled together in series.
In one embodiment, a resistive semiconductor device includes a plurality of magnetic memory storage cells disposed over a substrate. Each storage cell includes a first end and a second end, and the storage cells are coupled in series to one another so that a first end of one of the storage cells is coupled to a second end of an adjacent one of the storage cells.
In another embodiment, an MRAM semiconductor device includes a first transistor having a gate, a first source/drain region and second source/drain region disposed on a substrate. A second transistor includes a gate, a first source/drain region and a second source/drain region, and the second transistor first source/drain region is coupled to the first transistor second source/drain region. A first magnetic stack having a first end and a second end is coupled at its first end to the first transistor first source/drain region. The first magnetic stack second end is coupled to the first transistor second source/drain region. A second magnetic stack having a first end and a second end is coupled at its first end to the second transistor first source/drain region. The second magnetic stack second end is coupled to the second transistor second source/drain region.
In another embodiment, a method of manufacturing an MRAM semiconductor device includes forming a plurality of magnetic memory storage cells over a substrate. Each storage cell includes a first end and a second end. The storage cells are coupled together in series to one another so that a first end of one of the storage cells is coupled to a second end of an adjacent one of the storage cells.
Advantages of embodiments of the invention include providing an MRAM device with a smaller cell layout area than in the prior art. Lower power is consumed by the use of optional depletion devices in a preferred embodiment.